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| author |   Rakesh Babu Saladi <rsaladi2@marvell.com> | 2022-12-05 12:35:18 +0530 |
|---|---|---|
| committer |   Paolo Abeni <pabeni@redhat.com> | 2022-12-07 12:24:29 +0100 |
| commit | f2e664ad503d4e5ce7c42a0862ab164331a0ef37 (patch) | |
| tree | f841d14f4f8d6dfd24df092a718333624dabdbb0 /net/core/sock.c | |
| parent | Merge branch 'net-dsa-microchip-add-mtu-support-for-ksz8-series' (diff) | |
| download | wireguard-linux-f2e664ad503d4e5ce7c42a0862ab164331a0ef37.tar.xz wireguard-linux-f2e664ad503d4e5ce7c42a0862ab164331a0ef37.zip | |
octeontx2-af: Support variable number of lmacs
Most of the code in CGX/RPM driver assumes that max lmacs per
given MAC as always, 4 and the number of MAC blocks also as 4.
With this assumption, the max number of interfaces supported is
hardcoded to 16. This creates a problem as next gen CN10KB silicon
MAC supports 8 lmacs per MAC block.
This patch solves the problem by using "max lmac per MAC block"
value from constant csrs and uses cgx_cnt_max value which is
populated based number of MAC blocks supported by silicon.
Signed-off-by: Rakesh Babu Saladi <rsaladi2@marvell.com>
Signed-off-by: Hariprasad Kelam <hkelam@marvell.com>
Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Diffstat (limited to 'net/core/sock.c')
0 files changed, 0 insertions, 0 deletions