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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2025-02-05 15:09:03 +0100 |
|---|---|---|
| committer |   Alexandre Ghiti <alexghiti@rivosinc.com> | 2025-03-18 13:05:13 +0000 |
| commit | 72770690e02c082efbbbd78d768028cf8dd18b9c (patch) | |
| tree | ffabb42e63ad9b050631a7a6cab79bd32813659f /net/lapb/lapb_timer.c | |
| parent | riscv: defconfig: Disable Renesas SoC support (diff) | |
| download | wireguard-linux-72770690e02c082efbbbd78d768028cf8dd18b9c.tar.xz wireguard-linux-72770690e02c082efbbbd78d768028cf8dd18b9c.zip | |
riscv: Remove duplicate CLINT_TIMER selections
Since commit f862bbf4cdca696e ("riscv: Allow NOMMU kernels to run in
S-mode") in v6.10, CLINT_TIMER is selected by the main RISCV symbol when
RISCV_M_MODE is enabled.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/ce55529a42fa232cacd580e38866c60701f91095.1738764474.git.geert+renesas@glider.be
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Diffstat (limited to 'net/lapb/lapb_timer.c')
0 files changed, 0 insertions, 0 deletions