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author | 2024-12-16 20:39:10 -0500 | |
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committer | 2025-03-18 09:12:45 +0000 | |
commit | d9708b1931fc0ebb21cd94a56283d09222847749 (patch) | |
tree | c71d6dabdefb4051d9093b0908967705f4664367 /net/lapb/lapb_timer.c | |
parent | riscv: Call secondary mmu notifier when flushing the tlb (diff) | |
download | wireguard-linux-d9708b1931fc0ebb21cd94a56283d09222847749.tar.xz wireguard-linux-d9708b1931fc0ebb21cd94a56283d09222847749.zip |
riscv: Implement smp_cond_load8/16() with Zawrs
RISC-V code uses the queued spinlock implementation, which calls
the macros smp_cond_load_acquire for one byte. So, complement the
implementation of byte and halfword versions.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
Cc: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/20241217013910.1039923-1-guoren@kernel.org
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Diffstat (limited to 'net/lapb/lapb_timer.c')
0 files changed, 0 insertions, 0 deletions