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| author |   Chanwoo Choi <cw00.choi@samsung.com> | 2015-04-27 20:36:32 +0900 |
|---|---|---|
| committer |   Sylwester Nawrocki <s.nawrocki@samsung.com> | 2015-04-29 14:11:35 +0200 |
| commit | 85943d7ea5832afd454b7219ec1d8c2498c4fbcc (patch) | |
| tree | eeec9d2fea63cc3357385cf7d438c90478034de3 /net/switchdev/switchdev.c | |
| parent | clk: exynos5433: Fix wrong parent clock of sclk_apollo clock (diff) | |
| download | wireguard-linux-85943d7ea5832afd454b7219ec1d8c2498c4fbcc.tar.xz wireguard-linux-85943d7ea5832afd454b7219ec1d8c2498c4fbcc.zip | |
clk: exynos5433: Fix wrong PMS value of exynos5433_pll_rates
This patch fixes the wrong PMS value of exynos5433_pll_rates table
for {ATLAS|APOLLO|MEM0|MEM1|BUS|MFC|MPHY|G3D|DISP|ISP|_PLL.
- 720 MHz (mdiv=360, pdiv=6, sdiv=1) -> 700 MHz (mdiv=175, pdiv=3, sdiv=1)
- 350 MHz (mdiv=360, pdiv=6, sdiv=2) -> (mdiv=350, pdiv=6, sdiv=2)
- 133 MHz (mdiv=552, pdiv=6, sdiv=4) -> (mdiv=532, pdiv=6, sdiv=4)
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'net/switchdev/switchdev.c')
0 files changed, 0 insertions, 0 deletions