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| author |   Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2013-12-28 04:28:18 -0800 |
|---|---|---|
| committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2014-01-03 18:25:25 -0800 |
| commit | 55fdbfe7beb68c71060a27965a72f7eed09fa81d (patch) | |
| tree | 38a833c27b43979e468e5b119fb6355efe733576 /net/tipc | |
| parent | sh_eth: coding style fixes (diff) | |
| download | wireguard-linux-55fdbfe7beb68c71060a27965a72f7eed09fa81d.tar.xz wireguard-linux-55fdbfe7beb68c71060a27965a72f7eed09fa81d.zip | |
pci_regs.h: Add PCI bus link speed and width defines
Add missing PCI bus link speed 8.0 GT/s and bus link widths of
x1, x2, x4 and x8.
CC: <linux-kernel@vger.kernel.org>
CC: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'net/tipc')
0 files changed, 0 insertions, 0 deletions