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| author |   Biju Das <biju.das.jz@bp.renesas.com> | 2025-04-17 06:43:18 +0100 |
|---|---|---|
| committer |   Marc Kleine-Budde <mkl@pengutronix.de> | 2025-05-21 14:31:25 +0200 |
| commit | e5258b337de26c97cf210858407e0fc881bc0e3d (patch) | |
| tree | e1b1029ae4008caa6b063d730b47d02f54b83b0c /scripts/gdb/linux/interrupts.py | |
| parent | can: rcar_canfd: Add sh variable to struct rcar_canfd_hw_info (diff) | |
| download | wireguard-linux-e5258b337de26c97cf210858407e0fc881bc0e3d.tar.xz wireguard-linux-e5258b337de26c97cf210858407e0fc881bc0e3d.zip | |
can: rcar_canfd: Add external_clk variable to struct rcar_canfd_hw_info
All existing SoCs support an external clock, but RZ/G3E has only internal
clocks. Add external_clk variable to struct rcar_canfd_hw_info to handle
this difference.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Vincent Mailhol <mailhol.vincent@wanadoo.fr>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://patch.msgid.link/20250417054320.14100-18-biju.das.jz@bp.renesas.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Diffstat (limited to 'scripts/gdb/linux/interrupts.py')
0 files changed, 0 insertions, 0 deletions