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| author |   Lv Ruyi <lv.ruyi@zte.com.cn> | 2022-04-24 03:14:30 +0000 |
|---|---|---|
| committer |   Linus Walleij <linus.walleij@linaro.org> | 2022-04-24 16:24:09 +0200 |
| commit | 0c9843a74a85224a89daa81fa66891dae2f930e1 (patch) | |
| tree | dd96ae153b7da58306c55da1592c1a857e2ad08f /scripts/gdb/linux/utils.py | |
| parent | pinctrl: stm32: Keep pinctrl block clock enabled when LEVEL IRQ requested (diff) | |
| download | wireguard-linux-0c9843a74a85224a89daa81fa66891dae2f930e1.tar.xz wireguard-linux-0c9843a74a85224a89daa81fa66891dae2f930e1.zip | |
pinctrl: pistachio: fix use of irq_of_parse_and_map()
The irq_of_parse_and_map() function returns 0 on failure, and does not
return an negative value.
Fixes: cefc03e5995e ("pinctrl: Add Pistachio SoC pin control driver")
Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Lv Ruyi <lv.ruyi@zte.com.cn>
Link: https://lore.kernel.org/r/20220424031430.3170759-1-lv.ruyi@zte.com.cn
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions