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| author |   Allen-KH Cheng <Allen-KH.Cheng@mediatek.com> | 2022-02-07 19:26:57 +0800 |
|---|---|---|
| committer |   Thierry Reding <thierry.reding@gmail.com> | 2022-02-24 14:27:39 +0100 |
| commit | 113cc0b06570ea87568343f92839c092f21f7484 (patch) | |
| tree | 2f8d43f8734ead3cbf647fd9657af9651b29b3d9 /scripts/gdb/linux/utils.py | |
| parent | pwm: pca9685: Reset OFF/ON registers to POR value (diff) | |
| download | wireguard-linux-113cc0b06570ea87568343f92839c092f21f7484.tar.xz wireguard-linux-113cc0b06570ea87568343f92839c092f21f7484.zip | |
dt-bindings: pwm: mtk-disp: Add compatible string for MT8183 SoC
Add compatible string for MT8183 SoC in device tree binding.
Signed-off-by: Allen-KH Cheng <Allen-KH.Cheng@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions