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author | 2022-03-08 11:08:47 -0800 | |
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committer | 2022-04-14 07:18:05 +0900 | |
commit | 2142c27ef06bf8f9c0bd784395ea5aa1924cad49 (patch) | |
tree | 8f78fe007fdacfdb6d3d7869eece0c059302e38c /scripts/gdb/linux/utils.py | |
parent | Linux 5.18-rc1 (diff) | |
download | wireguard-linux-2142c27ef06bf8f9c0bd784395ea5aa1924cad49.tar.xz wireguard-linux-2142c27ef06bf8f9c0bd784395ea5aa1924cad49.zip |
dt-bindings: devfreq: rk3399_dmc: Convert to YAML
I want to add, deprecate, and bugfix some properties, as well as add the
first users. This is easier with a proper schema.
The transformation is mostly straightforward, plus a few notable tweaks:
* Renamed rockchip,dram_speed_bin to rockchip,ddr3_speed_bin. The
driver code and the example matched, but the description was
different. I went with the implementation. Note that this property is
also slated for deprecation/deletion in the subsequent patches.
* Drop upthreshold and downdifferential properties from the example.
These were undocumented (so, wouldn't pass validation), but were
representing software properties (governor tweaks). I drop them from
the driver in subsequent patches.
* Rename clock from pclk_ddr_mon to dmc_clk. The driver, DT example,
and all downstream users matched -- the binding definition was the
exception. Anyway, "dmc_clk" is a more appropriately generic name.
* Choose a better filename and location (this is a memory controller).
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
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