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| author |   Ryan Wanner <Ryan.Wanner@microchip.com> | 2025-01-07 09:07:26 -0700 |
|---|---|---|
| committer |   Claudiu Beznea <claudiu.beznea@tuxon.dev> | 2025-01-07 19:32:55 +0200 |
| commit | 261dcfad1b59efd0e77b014ff963b6fe1ada260b (patch) | |
| tree | a37f92fd921f72b5d795f023c47ea1e174f6992c /scripts/gdb/linux/utils.py | |
| parent | ARM: dts: microchip: sam9x7: Add address/size to spi-controller nodes (diff) | |
| download | wireguard-linux-261dcfad1b59efd0e77b014ff963b6fe1ada260b.tar.xz wireguard-linux-261dcfad1b59efd0e77b014ff963b6fe1ada260b.zip | |
ARM: dts: microchip: add sama7d65 SoC DT
Add Device Tree for sama7d65 SoC.
Co-developed-by: Dharma Balasubiramani <dharma.b@microchip.com>
Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com>
Co-developed-by: Romain Sioen <romain.sioen@microchip.com>
Signed-off-by: Romain Sioen <romain.sioen@microchip.com>
Co-developed-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Link: https://lore.kernel.org/r/20250107160850.120537-5-Ryan.Wanner@microchip.com
[claudiu.beznea: dropped comma typo from copyright, dropped space in
front of slow_xtal node, dropped empty space after slow_xtal node]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions