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| author |   Alex Deucher <alexander.deucher@amd.com> | 2022-04-01 11:08:48 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-04-06 12:02:57 -0400 |
| commit | 2f25d8ce09b7ba5d769c132ba3d4eb84a941d2cb (patch) | |
| tree | 580ef6ddf5c17f5e3d1742a19a7dd6fb5186b855 /scripts/gdb/linux/utils.py | |
| parent | drm/amd/display: update dcn315 clock table read (diff) | |
| download | wireguard-linux-2f25d8ce09b7ba5d769c132ba3d4eb84a941d2cb.tar.xz wireguard-linux-2f25d8ce09b7ba5d769c132ba3d4eb84a941d2cb.zip | |
drm/amdgpu/smu10: fix SoC/fclk units in auto mode
SMU takes clock limits in Mhz units. socclk and fclk were
using 10 khz units in some cases. Switch to Mhz units.
Fixes higher than required SoC clocks.
Fixes: 97cf32996c46d9 ("drm/amd/pm: Removed fixed clock in auto mode DPM")
Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions