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| author |   Heiko Stuebner <heiko@sntech.de> | 2015-01-20 21:12:16 +0100 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2015-01-28 11:02:07 +0100 |
| commit | 39d05162a530b8e58119952dd60c7204e8512f0d (patch) | |
| tree | 2d53652603c699f7437899f774561a66c8631915 /scripts/gdb/linux/utils.py | |
| parent | Merge branch 'v3.20-clk/new-ids' into v3.20-armsoc/dts (diff) | |
| download | wireguard-linux-39d05162a530b8e58119952dd60c7204e8512f0d.tar.xz wireguard-linux-39d05162a530b8e58119952dd60c7204e8512f0d.zip | |
ARM: dts: rockchip: add rk3288 watchdog clock
Add the clock property for the watchdog on rk3288 socs.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions