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author | 2025-01-21 11:22:46 -0800 | |
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committer | 2025-01-21 11:22:46 -0800 | |
commit | 53c9c27672bb0241998ddf2d1588106920d4064b (patch) | |
tree | eff0dac5f72837c0da24e8d8d1d5e95e8fa1fb9d /scripts/gdb/linux/utils.py | |
parent | Merge branches 'clk-airoha', 'clk-rockchip', 'clk-stm', 'clk-thead' and 'clk-bcm' into clk-next (diff) | |
parent | clk: clk-loongson2: Fix the number count of clk provider (diff) | |
download | wireguard-linux-53c9c27672bb0241998ddf2d1588106920d4064b.tar.xz wireguard-linux-53c9c27672bb0241998ddf2d1588106920d4064b.zip |
Merge branch 'clk-fixes' into clk-next
* clk-fixes:
clk: clk-loongson2: Fix the number count of clk provider
clk: mmp2: call pm_genpd_init() only after genpd.name is set
clk: sunxi-ng: a100: enable MMC clock reparenting
clk: clk-imx8mp-audiomix: fix function signature
clk: thead: Fix TH1520 emmc and shdci clock rate
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions