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| author |   Ryan Wanner <Ryan.Wanner@microchip.com> | 2024-12-06 12:59:55 -0700 |
|---|---|---|
| committer |   Claudiu Beznea <claudiu.beznea@tuxon.dev> | 2025-01-02 12:33:54 +0200 |
| commit | 747800ee7fdf80533538318608ae922f8b3d0069 (patch) | |
| tree | 7e63a5df1b21a17bfd7d828cedc28bd7e959b8b8 /scripts/gdb/linux/utils.py | |
| parent | dt-bindings: atmel-sysreg: add sama7d65 RAM and PIT (diff) | |
| download | wireguard-linux-747800ee7fdf80533538318608ae922f8b3d0069.tar.xz wireguard-linux-747800ee7fdf80533538318608ae922f8b3d0069.zip | |
ARM: dts: at91: Add sama7d65 pinmux
Add sama7d65 pin descriptions.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Link: https://lore.kernel.org/r/a8f880b89cd4470526a2955a0b6aaaaa24ba65b8.1733505542.git.Ryan.Wanner@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions