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| author |   Andre Przywara <andre.przywara@arm.com> | 2025-03-07 00:26:22 +0000 |
|---|---|---|
| committer |   Chen-Yu Tsai <wens@csie.org> | 2025-03-12 11:58:10 +0800 |
| commit | 74b0443a0d0ad283f20ee2985758143485942c31 (patch) | |
| tree | a8020dc9e116fd3d636ec60319122acb3739977f /scripts/gdb/linux/utils.py | |
| parent | clk: sunxi-ng: a523: add video mod clocks (diff) | |
| download | wireguard-linux-74b0443a0d0ad283f20ee2985758143485942c31.tar.xz wireguard-linux-74b0443a0d0ad283f20ee2985758143485942c31.zip | |
clk: sunxi-ng: a523: add system mod clocks
Add the clocks driving some core system related subsystems of the SoC:
the "CE" crypto engine, the high speed timers, the DRAM and the associated
MBUS clock, and the PCIe clock.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://patch.msgid.link/20250307002628.10684-9-andre.przywara@arm.com
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions