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| author |   Sairaj Kodilkar <sarunkod@amd.com> | 2025-03-07 15:28:21 +0530 |
|---|---|---|
| committer |   Joerg Roedel <jroedel@suse.de> | 2025-03-13 12:14:16 +0100 |
| commit | 950865c1b88abf190eaec5fa703e5fef05093e30 (patch) | |
| tree | 8b5e2ec49ce1380ee287b8eaec31138d1d570066 /scripts/gdb/linux/utils.py | |
| parent | iommu/amd: Replace slab cache allocator with page allocator (diff) | |
| download | wireguard-linux-950865c1b88abf190eaec5fa703e5fef05093e30.tar.xz wireguard-linux-950865c1b88abf190eaec5fa703e5fef05093e30.zip | |
iommu/amd: Rename DTE_INTTABLEN* and MAX_IRQS_PER_TABLE macro
AMD iommu can support both 512 and 2K interrupts on newer platform. Hence
add suffix "512" to the existing macros.
Signed-off-by: Sairaj Kodilkar <sarunkod@amd.com>
Reviewed-by: Vasant Hegde <vasant.hegde@amd.com>
Link: https://lore.kernel.org/r/20250307095822.2274-4-sarunkod@amd.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions