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| author |   Mark Bloch <mbloch@nvidia.com> | 2022-04-10 11:58:05 +0000 |
|---|---|---|
| committer |   Saeed Mahameed <saeedm@nvidia.com> | 2022-05-04 00:00:07 -0700 |
| commit | a042d7f5bb68c47f6e0e546ca367d14e1e4b25ba (patch) | |
| tree | 0e6bf513f6f05ad7675b83252da98867ad508d4d /scripts/gdb/linux/utils.py | |
| parent | net/mlx5: Avoid double clear or set of sync reset requested (diff) | |
| download | wireguard-linux-a042d7f5bb68c47f6e0e546ca367d14e1e4b25ba.tar.xz wireguard-linux-a042d7f5bb68c47f6e0e546ca367d14e1e4b25ba.zip | |
net/mlx5: Fix matching on inner TTC
The cited commits didn't use proper matching on inner TTC
as a result distribution of encapsulated packets wasn't symmetric
between the physical ports.
Fixes: 4c71ce50d2fe ("net/mlx5: Support partial TTC rules")
Fixes: 8e25a2bc6687 ("net/mlx5: Lag, add support to create TTC tables for LAG port selection")
Signed-off-by: Mark Bloch <mbloch@nvidia.com>
Reviewed-by: Maor Gottlieb <maorg@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions