diff options
| author |   Heiko Stuebner <heiko@sntech.de> | 2022-05-11 21:29:21 +0200 |
|---|---|---|
| committer |   Palmer Dabbelt <palmer@rivosinc.com> | 2022-05-11 21:36:33 -0700 |
| commit | a35707c3d850dda0ceefb75b1b3bd191921d5765 (patch) | |
| tree | 00188dae0c8c04eabd08b304924d1d84c92acbd1 /scripts/gdb/linux/utils.py | |
| parent | riscv: don't use global static vars to store alternative data (diff) | |
| download | wireguard-linux-a35707c3d850dda0ceefb75b1b3bd191921d5765.tar.xz wireguard-linux-a35707c3d850dda0ceefb75b1b3bd191921d5765.zip | |
riscv: add memory-type errata for T-Head
Some current cpus based on T-Head cores implement memory-types
way different than described in the svpbmt spec even going
so far as using PTE bits marked as reserved.
Add the T-Head vendor-id and necessary errata code to
replace the affected instructions.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20220511192921.2223629-13-heiko@sntech.de
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions