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| author |   Philippe Simons <simons.philippe@gmail.com> | 2025-03-18 21:51:47 +0100 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2025-03-19 12:28:26 +0000 |
| commit | c94764d3f4e503c0c4d56c8f64a8a63645091898 (patch) | |
| tree | 5b4320ce6584ca91996a171b40131e2e11eec1dc /scripts/gdb/linux/utils.py | |
| parent | regulator: dt-bindings: rtq2208: Cleanup whitespace (diff) | |
| download | wireguard-linux-c94764d3f4e503c0c4d56c8f64a8a63645091898.tar.xz wireguard-linux-c94764d3f4e503c0c4d56c8f64a8a63645091898.zip | |
regulator: axp20x: AXP717: dcdc4 doesn't have delay
According to AXP717 user manual, DCDC4 doesn't have a ramp delay like
DCDC1/2/3 do.
Remove it from the description and cleanup the macros.
Signed-off-by: Philippe Simons <simons.philippe@gmail.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Link: https://patch.msgid.link/20250318205147.42850-1-simons.philippe@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions