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authorRussell King (Oracle) <rmk+kernel@armlinux.org.uk>2025-03-20 22:11:27 +0000
committerJakub Kicinski <kuba@kernel.org>2025-03-25 07:58:04 -0700
commitdd557266cf5fb01a8cd85482dd258c1e172301d1 (patch)
treebfbd662cf70a8cefc5ad9353998281f137045845 /scripts/gdb/linux/utils.py
parentnet: phylink: add functions to block/unblock rx clock stop (diff)
downloadwireguard-linux-dd557266cf5fb01a8cd85482dd258c1e172301d1.tar.xz
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net: stmmac: block PHY RXC clock-stop
The DesignWare core requires the receive clock to be running during certain operations. Ensure that we block PHY RXC clock-stop during these operations. This is a best-efforts change - not everywhere can be covered by this because of net's core locking, which means we can't access the MDIO bus to configure the PHY to disable RXC clock-stop in certain areas. These are marked with FIXME comments. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1tvO6p-008Vjz-Qy@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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