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| author |   Mihai Sain <mihai.sain@microchip.com> | 2024-12-18 10:03:32 +0200 |
|---|---|---|
| committer |   Claudiu Beznea <claudiu.beznea@tuxon.dev> | 2025-01-02 12:33:57 +0200 |
| commit | f0127f66528f550815320188e08ceb26f5f2f81b (patch) | |
| tree | f3b9df1d642aa53144abe7f5432969f175edbb5b /scripts/gdb/linux/utils.py | |
| parent | ARM: dts: microchip: sama5d27_wlsom1_ek: Add no-1-8-v property to sdmmc0 node (diff) | |
| download | wireguard-linux-f0127f66528f550815320188e08ceb26f5f2f81b.tar.xz wireguard-linux-f0127f66528f550815320188e08ceb26f5f2f81b.zip | |
ARM: dts: microchip: sam9x60: Add address/size to spi-controller nodes
Since these properties are common for all spi subnodes,
add them to SoC dtsi instead of board dts.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20241218080333.2225-2-mihai.sain@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions