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| author |   Roman Beranek <me@crly.cz> | 2023-05-05 07:21:10 +0200 |
|---|---|---|
| committer |   Maxime Ripard <maxime@cerno.tech> | 2023-05-10 16:03:19 +0200 |
| commit | 4795c78768bcbd58d4ffab650674d314dc6dd772 (patch) | |
| tree | d1db11a6894b8ec06de0709a1f8f96bd1f29b021 /scripts/gdb/linux/utils.py | |
| parent | drm: sun4i: rename sun4i_dotclock to sun4i_tcon_dclk (diff) | |
| download | wireguard-linux-4795c78768bcbd58d4ffab650674d314dc6dd772.tar.xz wireguard-linux-4795c78768bcbd58d4ffab650674d314dc6dd772.zip | |
drm: sun4i: calculate proper DCLK rate for DSI
In DSI mode, TCON0's data clock is required to run at 1/4 the per-lane
bit rate.
Signed-off-by: Roman Beranek <me@crly.cz>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20230505052110.67514-5-me@crly.cz
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions