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| author |   Fabrizio Castro <fabrizio.castro.jz@renesas.com> | 2023-06-22 12:33:37 +0100 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2023-06-23 11:04:19 +0100 |
| commit | 14dde0746e67588524d8dd464ac5e4afd3478bb3 (patch) | |
| tree | c08f152ef7bcd1111049d07b89c9600667515269 /scripts/generate_rust_analyzer.py | |
| parent | spi: Helper for deriving timeout values (diff) | |
| download | wireguard-linux-14dde0746e67588524d8dd464ac5e4afd3478bb3.tar.xz wireguard-linux-14dde0746e67588524d8dd464ac5e4afd3478bb3.zip | |
spi: dt-bindings: Add bindings for RZ/V2M CSI
Add dt-bindings for the CSI IP found inside the RZ/V2M SoC.
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/Message-Id: <20230622113341.657842-2-fabrizio.castro.jz@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions