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| author |   Linus Torvalds <torvalds@linux-foundation.org> | 2024-12-13 17:29:19 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2024-12-13 17:29:19 -0800 |
| commit | f86135613a2552b1e6c0875726f45b34b0ddd5a6 (patch) | |
| tree | 6b2d3706c49ab905198d2cdae12e27f22876b94c /scripts/generate_rust_analyzer.py | |
| parent | Merge tag 'regulator-fix-v6.13-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator (diff) | |
| parent | spi: spi-cadence-qspi: Disable STIG mode for Altera SoCFPGA. (diff) | |
| download | wireguard-linux-f86135613a2552b1e6c0875726f45b34b0ddd5a6.tar.xz wireguard-linux-f86135613a2552b1e6c0875726f45b34b0ddd5a6.zip | |
Merge tag 'spi-fix-v6.13-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi fixes from Mark Brown:
"A few fairly small fixes for v6.13, the most substatial one being
disabling STIG mode for Cadence QSPI controllers on Altera SoCFPGA
platforms since it doesn't work"
* tag 'spi-fix-v6.13-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
spi: spi-cadence-qspi: Disable STIG mode for Altera SoCFPGA.
spi: rockchip: Fix PM runtime count on no-op cs
spi: aspeed: Fix an error handling path in aspeed_spi_[read|write]_user()
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions