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| author |   Mark Brown <broonie@kernel.org> | 2023-10-10 17:23:42 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2023-10-10 17:23:42 +0100 |
| commit | 8097dbd4b631b1f4cfe3def909f828b071d99ad7 (patch) | |
| tree | cd964fedd4285b1303b4e6111dfb011ea81e8b4c /scripts/generate_rust_target.rs | |
| parent | spi: bcm2835: add a sentinel at the end of the lookup array (diff) | |
| parent | spi: rzv2m-csi: Add target mode support (diff) | |
| download | wireguard-linux-8097dbd4b631b1f4cfe3def909f828b071d99ad7.tar.xz wireguard-linux-8097dbd4b631b1f4cfe3def909f828b071d99ad7.zip | |
spi: Add RZ/V2M CSI target support
Merge series from Fabrizio Castro <fabrizio.castro.jz@renesas.com>:
The CSI IP found inside the Renesas RZ/V2M SoC supports both SPI host
and target. This series extends the CSI dt-bindings and driver to
add SPI target support.
Diffstat (limited to 'scripts/generate_rust_target.rs')
0 files changed, 0 insertions, 0 deletions