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| author |   Kishon Vijay Abraham I <kishon@ti.com> | 2020-07-22 16:33:10 +0530 |
|---|---|---|
| committer |   Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2020-07-27 15:46:16 +0100 |
| commit | d07701a17aec3e3a777b882b46b0af6650f7cd1d (patch) | |
| tree | 56100fc07aea4989db1258167dc37ead510b8d92 /scripts | |
| parent | dt-bindings: PCI: cadence: Remove "mem" from reg binding (diff) | |
| download | wireguard-linux-d07701a17aec3e3a777b882b46b0af6650f7cd1d.tar.xz wireguard-linux-d07701a17aec3e3a777b882b46b0af6650f7cd1d.zip | |
PCI: cadence: Add new *ops* for CPU addr fixup
Cadence driver uses "mem" memory resource to obtain the offset of
configuration space address region, memory space address region and
message space address region. The obtained offset is used to program
the Address Translation Unit (ATU). However certain platforms like TI's
J721E SoC require the absolute address to be programmed in the ATU and
not just the offset. Add new *ops* for CPU addr fixup for the platform
drivers to provide the correct address to be programmed in the ATU.
Link: https://lore.kernel.org/r/20200722110317.4744-9-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions