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| author |   Vineet Gupta <vgupta@synopsys.com> | 2015-04-03 12:37:07 +0300 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2015-06-25 06:00:19 +0530 |
| commit | 795f4558562fd5318260d5d8144a2f8612aeda7b (patch) | |
| tree | b4cb8211acf56f2f8acc7ef1429cee4e667f2834 /tools/perf/scripts/python/call-graph-from-postgresql.py | |
| parent | ARCv2: STAR 9000837815 workaround hardware exclusive transactions livelock (diff) | |
| download | wireguard-linux-795f4558562fd5318260d5d8144a2f8612aeda7b.tar.xz wireguard-linux-795f4558562fd5318260d5d8144a2f8612aeda7b.zip | |
ARCv2: SLC: Handle explcit flush for DMA ops (w/o IO-coherency)
L2 cache on ARCHS processors is called SLC (System Level Cache)
For working DMA (in absence of hardware assisted IO Coherency) we need
to manage SLC explicitly when buffers transition between cpu and
controllers.
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-postgresql.py')
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