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| author |   Tuomas Tynkkynen <ttynkkynen@nvidia.com> | 2015-05-13 17:58:49 +0300 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2015-08-21 18:44:25 +0200 |
| commit | 0de088cc3463d451ca96439c723cc58932430820 (patch) | |
| tree | c7044eeb72a8339bbeb0a301eff7fdff9c3d6535 /tools/perf/scripts/python/call-graph-from-postgresql.py | |
| parent | ARM: tegra: Enable the DFLL on the Jetson TK1 (diff) | |
| download | wireguard-linux-0de088cc3463d451ca96439c723cc58932430820.tar.xz wireguard-linux-0de088cc3463d451ca96439c723cc58932430820.zip | |
ARM: tegra: Add entries for cpufreq on Tegra124
The Tegra124 cpufreq driver relies on certain clocks being present
in the /cpus/cpu@0 node.
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-postgresql.py')
0 files changed, 0 insertions, 0 deletions