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| author |   Dave Jiang <dave.jiang@intel.com> | 2023-12-21 15:03:45 -0700 |
|---|---|---|
| committer |   Dan Williams <dan.j.williams@intel.com> | 2023-12-22 15:31:52 -0800 |
| commit | f2202f990456acc52b50f6b14c95b232ac14429b (patch) | |
| tree | 5f80c7146bcc43e1a00b5172143ac1eb6be1edb6 /tools/perf/scripts/python/call-graph-from-postgresql.py | |
| parent | cxl: Calculate and store PCI link latency for the downstream ports (diff) | |
| download | wireguard-linux-f2202f990456acc52b50f6b14c95b232ac14429b.tar.xz wireguard-linux-f2202f990456acc52b50f6b14c95b232ac14429b.zip | |
tools/testing/cxl: Add hostbridge UID string for cxl_test mock hb devices
In order to support acpi_device_uid() call, add static string to
acpi_device->pnp.unique_id.
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/170319622564.2212653.1534465446670631698.stgit@djiang5-mobl3
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-postgresql.py')
0 files changed, 0 insertions, 0 deletions