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| author |   Gregory CLEMENT <gregory.clement@free-electrons.com> | 2012-10-26 14:30:47 +0200 |
|---|---|---|
| committer |   Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2012-11-20 15:42:06 +0100 |
| commit | a6a6de1a0a8479ad5c31392a9896dfd735e3c5f5 (patch) | |
| tree | 6622e51e244af9db50ba01aae7f8f3209db5ec87 /tools/perf/scripts/python/check-perf-trace.py | |
| parent | arm: mvebu: increase atomic coherent pool size for armada 370/XP (diff) | |
| download | wireguard-linux-a6a6de1a0a8479ad5c31392a9896dfd735e3c5f5.tar.xz wireguard-linux-a6a6de1a0a8479ad5c31392a9896dfd735e3c5f5.zip | |
arm: mvebu: SATA support: SoC-level DT data for Armada 370/XP
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Lior Amsalem <alior@marvell.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions