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| author |   Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2021-04-10 04:19:01 +0300 |
|---|---|---|
| committer |   Rob Clark <robdclark@chromium.org> | 2021-04-27 10:10:13 -0700 |
| commit | 08811c057b3e22f7a3df3955c138a59f3b651df0 (patch) | |
| tree | 5303c6e16771ac6c1f914abeb84921eb32f57fa1 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/msm: fix LLC not being enabled for mmu500 targets (diff) | |
| download | wireguard-linux-08811c057b3e22f7a3df3955c138a59f3b651df0.tar.xz wireguard-linux-08811c057b3e22f7a3df3955c138a59f3b651df0.zip | |
drm/msm/dsi: dsi_phy_28nm_8960: fix uninitialized variable access
The parent_name initialization was lost in refactoring, restore it now.
Fixes: 5d13459650b3 ("drm/msm/dsi: push provided clocks handling into a generic code")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Link: https://lore.kernel.org/r/20210410011901.1735866-1-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions