diff options
| author |   Linus Walleij <linus.walleij@linaro.org> | 2018-02-06 10:35:39 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2018-02-07 09:08:46 +0100 |
| commit | 08e3211251e36a506ff6b0c31620e362b5800f47 (patch) | |
| tree | 49d795cba06fb5e11375b3ebaa02cdd55958b84f /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/pl111: Support variants with broken clock divider (diff) | |
| download | wireguard-linux-08e3211251e36a506ff6b0c31620e362b5800f47.tar.xz wireguard-linux-08e3211251e36a506ff6b0c31620e362b5800f47.zip | |
drm/pl111: Support variants with broken VBLANK
The early Integrator CLCD synthesized in the Integrator CP and
IM-PD1 FPGAs are broken: their vertical and next base interrupts
are not functional. Support these variants by simply disabling
the use of the vblank interrupt on these variants.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20180206093540.8147-4-linus.walleij@linaro.org
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions