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| author |   Daniele Alessandrelli <daniele.alessandrelli@intel.com> | 2020-07-17 10:04:13 +0100 |
|---|---|---|
| committer |   Arnd Bergmann <arnd@arndb.de> | 2020-07-17 16:32:18 +0200 |
| commit | 0a6e92f26784b8c6a9d24c26da7278a7362531ee (patch) | |
| tree | ae86df54b3afa2d8792d9cf4b8206ff7452bb32e /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | MAINTAINERS: Add maintainers for Keem Bay SoC (diff) | |
| download | wireguard-linux-0a6e92f26784b8c6a9d24c26da7278a7362531ee.tar.xz wireguard-linux-0a6e92f26784b8c6a9d24c26da7278a7362531ee.zip | |
arm64: dts: keembay: Add device tree for Keem Bay SoC
Add initial device tree for Intel Movidius SoC code-named Keem Bay.
This initial DT includes nodes for Cortex-A53 cores, UARTs, GIC, PSCI,
and PMU.
Link: https://lore.kernel.org/r/20200717090414.313530-5-daniele.alessandrelli@linux.intel.com
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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0 files changed, 0 insertions, 0 deletions