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| author |   George Shen <george.shen@amd.com> | 2020-12-22 14:05:41 -0500 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2021-02-02 17:37:37 -0500 |
| commit | 2b6b7ab4b1cabfbee1af5d818efcab5d51d62c7e (patch) | |
| tree | b2cab559e1a85aa5f5243545d978d0afd6d5a097 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/amdgpu: enable freesync for A+A configs (diff) | |
| download | wireguard-linux-2b6b7ab4b1cabfbee1af5d818efcab5d51d62c7e.tar.xz wireguard-linux-2b6b7ab4b1cabfbee1af5d818efcab5d51d62c7e.zip | |
drm/amd/display: Fix DPCD translation for LTTPR AUX_RD_INTERVAL
[Why]
The translation between the DPCD value and the specified AUX_RD_INTERVAL
in the DP spec do not match.
[How]
Update values to match the spec.
Signed-off-by: George Shen <george.shen@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions