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| author |   Thor Thayer <tthayer@opensource.altera.com> | 2014-08-26 16:09:32 -0500 |
|---|---|---|
| committer |   Dinh Nguyen <dinguyen@opensource.altera.com> | 2014-09-04 10:15:52 -0500 |
| commit | 75a41826e2c5dc1dc0fd5195fc29b031c97337af (patch) | |
| tree | a9d692fa58fd74ba79a2201a5326cb7f3ce83e29 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ARM: dts: socfpga: memreserve first 4KB for future system use (diff) | |
| download | wireguard-linux-75a41826e2c5dc1dc0fd5195fc29b031c97337af.tar.xz wireguard-linux-75a41826e2c5dc1dc0fd5195fc29b031c97337af.zip | |
arm: dts: Add Altera SDRAM EDAC bindings & devicetree entries.
Add the Altera SDRAM EDAC bindings and device tree changes to the Altera SoC
project.
There was a discussion thread on whether this driver should be an mfd driver
or just make use of syscon, which is already a mfd. Ultimately, the
decision to use a simple syscon interface was reached.[1]
[1] https://lkml.org/lkml/2014/7/30/514
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
[dinguyen] cleaned-up commit header and remove version history.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
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