aboutsummaryrefslogtreecommitdiffstatshomepage
path: root/tools/perf/scripts/python/export-to-postgresql.py
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2014-09-11 09:49:31 +0200
committerArnd Bergmann <arnd@arndb.de>2014-09-11 09:49:31 +0200
commit96bdd9aeb2cbc5eaae586f4d43badd072611fcb1 (patch)
treed7c877042d1b840e4939d24f8e4fe290e52b3b65 /tools/perf/scripts/python/export-to-postgresql.py
parentMerge tag 'socfpga_update_for_v3.18' of git://git.rocketboards.org/linux-socfpga-next into next/dt (diff)
parentARM: shmobile: Initial Alt board device tree (diff)
downloadwireguard-linux-96bdd9aeb2cbc5eaae586f4d43badd072611fcb1.tar.xz
wireguard-linux-96bdd9aeb2cbc5eaae586f4d43badd072611fcb1.zip
Merge tag 'renesas-dt4-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Fourth Round of Renesas ARM Based SoC DT Updates for v3.18" from Simon Horman: * Add r8a7794 SoC and Alt board device tree * Correct lager memory map Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'renesas-dt4-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Initial Alt board device tree ARM: shmobile: Initial r8a7794 SoC device tree ARM: shmobile: lager: correct memory map
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions