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author | 2014-09-11 09:49:31 +0200 | |
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committer | 2014-09-11 09:49:31 +0200 | |
commit | 96bdd9aeb2cbc5eaae586f4d43badd072611fcb1 (patch) | |
tree | d7c877042d1b840e4939d24f8e4fe290e52b3b65 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | Merge tag 'socfpga_update_for_v3.18' of git://git.rocketboards.org/linux-socfpga-next into next/dt (diff) | |
parent | ARM: shmobile: Initial Alt board device tree (diff) | |
download | wireguard-linux-96bdd9aeb2cbc5eaae586f4d43badd072611fcb1.tar.xz wireguard-linux-96bdd9aeb2cbc5eaae586f4d43badd072611fcb1.zip |
Merge tag 'renesas-dt4-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Fourth Round of Renesas ARM Based SoC DT Updates for v3.18" from Simon Horman:
* Add r8a7794 SoC and Alt board device tree
* Correct lager memory map
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* tag 'renesas-dt4-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Initial Alt board device tree
ARM: shmobile: Initial r8a7794 SoC device tree
ARM: shmobile: lager: correct memory map
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