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| author |   Bjorn Helgaas <bhelgaas@google.com> | 2020-06-04 12:59:12 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2020-06-04 12:59:12 -0500 |
| commit | ae7322a06d225fadfc43a3eda950fc2b65d2d7a1 (patch) | |
| tree | 5c20dfad6d9e1218752433542d7e10b308bd5394 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Merge branch 'pci/p2pdma' (diff) | |
| parent | PCI/PM: Assume ports without DLL Link Active train links in 100 ms (diff) | |
| download | wireguard-linux-ae7322a06d225fadfc43a3eda950fc2b65d2d7a1.tar.xz wireguard-linux-ae7322a06d225fadfc43a3eda950fc2b65d2d7a1.zip | |
Merge branch 'pci/pm'
- Check .bridge_d3() hook for NULL before calling it (Bjorn Helgaas)
- Disable PME# for Pericom OHCI/UHCI USB controllers because it's
not reliably asserted on USB hotplug (Kai-Heng Feng)
- Assume ports without DLL Link Active train links in 100 ms to work
around Thunderbolt bridge defects (Mika Westerberg)
* pci/pm:
PCI/PM: Assume ports without DLL Link Active train links in 100 ms
PCI/PM: Adjust pcie_wait_for_link_delay() for caller delay
PCI: Avoid Pericom USB controller OHCI/EHCI PME# defect
serial: 8250_pci: Move Pericom IDs to pci_ids.h
PCI/PM: Call .bridge_d3() hook only if non-NULL
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions