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author | 2024-01-12 12:19:40 -0500 | |
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committer | 2024-02-14 17:13:03 -0500 | |
commit | bb46122db730f42f3fc1d9d511b3d6ebe8375cdd (patch) | |
tree | 2d19f67ecb2db9f441e9dee2e472926cc1b52ee5 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | drm/amd/display: enable fgcg by default (diff) | |
download | wireguard-linux-bb46122db730f42f3fc1d9d511b3d6ebe8375cdd.tar.xz wireguard-linux-bb46122db730f42f3fc1d9d511b3d6ebe8375cdd.zip |
drm/amd/display: Update FIXED_VS Retimer HWSS Test Pattern Sequences
[WHY]
Need to fix some broken logic and sequencing in initial commit
[HOW]
Fix logic handling override deprogramming when exiting SQ128.
Don't exit early from dp_set_hw_lane_settings for DP2/FIXED_VS case.
Move LTTPR 128b/132b check out of requires_hwss and check during
runtime, as LTTPR caps are not populated on initial call.
Add pending_test_pattern to link state to allow HWSS to set FFE overrides
on retimer TX and/or skip setting APU TX FFE depending on requested pattern.
Use updated clock source for SQ128 override sequence.
Skip HW FFE preset programming when performing test pattern overrides.
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions