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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2018-03-15 10:43:12 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-03-21 17:34:29 +0100 |
| commit | c733c7d9374191cac6668ce6ea074909d036d8f4 (patch) | |
| tree | 248bbf0358bde3540deb7ac7aceb6162f57a2f48 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | clk: renesas: r8a77965: Replace DU2 clock (diff) | |
| download | wireguard-linux-c733c7d9374191cac6668ce6ea074909d036d8f4.tar.xz wireguard-linux-c733c7d9374191cac6668ce6ea074909d036d8f4.zip | |
clk: renesas: div6: Always use readl()/writel()
On arm32/arm64, there is no reason to use the (soon deprecated)
clk_readl()/clk_writel(). Hence use the generic readl()/writel()
instead.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions