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| author |   Jing Liu <jing2.liu@intel.com> | 2022-01-05 04:35:14 -0800 |
|---|---|---|
| committer |   Paolo Bonzini <pbonzini@redhat.com> | 2022-01-07 13:33:04 -0500 |
| commit | cc04b6a21d431359eceeec0d812b492088b04af5 (patch) | |
| tree | 39bd997cf64cc983f1efe5553ebd833a8befb501 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | x86/fpu: Prepare guest FPU for dynamically enabled FPU features (diff) | |
| download | wireguard-linux-cc04b6a21d431359eceeec0d812b492088b04af5.tar.xz wireguard-linux-cc04b6a21d431359eceeec0d812b492088b04af5.zip | |
kvm: x86: Fix xstate_required_size() to follow XSTATE alignment rule
CPUID.0xD.1.EBX enumerates the size of the XSAVE area (in compacted
format) required by XSAVES. If CPUID.0xD.i.ECX[1] is set for a state
component (i), this state component should be located on the next
64-bytes boundary following the preceding state component in the
compacted layout.
Fix xstate_required_size() to follow the alignment rule. AMX is the
first state component with 64-bytes alignment to catch this bug.
Signed-off-by: Jing Liu <jing2.liu@intel.com>
Signed-off-by: Yang Zhong <yang.zhong@intel.com>
Message-Id: <20220105123532.12586-4-yang.zhong@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions