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| author |   Daniel Mack <daniel@zonque.org> | 2018-05-23 11:14:40 +0300 |
|---|---|---|
| committer |   Kalle Valo <kvalo@codeaurora.org> | 2018-05-25 13:07:34 +0300 |
| commit | ce1d4be82b1009374f7bea0229fb6758cb1afb84 (patch) | |
| tree | b61f37dd4169ab9bec86b9b50a95569a159f0fda /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | wcn36xx: clear all masks in RX interrupt (diff) | |
| download | wireguard-linux-ce1d4be82b1009374f7bea0229fb6758cb1afb84.tar.xz wireguard-linux-ce1d4be82b1009374f7bea0229fb6758cb1afb84.zip | |
wcn36xx: only handle packets when ED or DONE bit is set
On RX and TX interrupts, check for the WCN36XX_CH_STAT_INT_ED_MASK or
WCN36XX_CH_STAT_INT_DONE_MASK in the interrupt reason register, and
only handle packets when it is set. This way, reap_tx_dxes() is only
invoked when needed.
This brings the dequeing logic in line with what the prima downstream
driver is doing.
While at it, also log the interrupt reason.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions