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| author |   Nathan Chancellor <nathan@kernel.org> | 2021-04-15 08:29:14 -0700 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2021-05-17 12:31:05 +0200 |
| commit | dc9a91d279b721aef7c4f1a2e2e33631d388446f (patch) | |
| tree | 3540f33295a13adec5a3cb99ba12e95dcff27ba4 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/tegra: sor: Fully initialize SOR before registration (diff) | |
| download | wireguard-linux-dc9a91d279b721aef7c4f1a2e2e33631d388446f.tar.xz wireguard-linux-dc9a91d279b721aef7c4f1a2e2e33631d388446f.zip | |
drm/tegra: Fix shift overflow in tegra_shared_plane_atomic_update
Clang warns:
drivers/gpu/drm/tegra/hub.c:513:11: warning: shift count >= width of
type [-Wshift-count-overflow]
base |= BIT(39);
^~~~~~~
BIT is unsigned long, which is 32-bit on ARCH=arm, hence the overflow
warning. Switch to BIT_ULL, which is 64-bit and will not overflow.
Fixes: 7b6f846785f4 ("drm/tegra: Support sector layout on Tegra194")
Link: https://github.com/ClangBuiltLinux/linux/issues/1351
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions