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| author |   Tomasz Nowicki <tn@semihalf.com> | 2020-07-15 09:06:48 +0200 |
|---|---|---|
| committer |   Will Deacon <will@kernel.org> | 2020-07-16 09:29:22 +0100 |
| commit | e85e84d19b9dac3d3ac92c9f6a24d034691f1243 (patch) | |
| tree | d53a8643a2b8e72c7ebf02d361536e917ae43023 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | iommu/arm-smmu: Workaround for Marvell Armada-AP806 SoC erratum #582743 (diff) | |
| download | wireguard-linux-e85e84d19b9dac3d3ac92c9f6a24d034691f1243.tar.xz wireguard-linux-e85e84d19b9dac3d3ac92c9f6a24d034691f1243.zip | |
dt-bindings: arm-smmu: add compatible string for Marvell Armada-AP806 SMMU-500
Add specific compatible string for Marvell usage due to errata of
accessing 64bits registers of ARM SMMU, in AP806.
AP806 SoC uses the generic ARM-MMU500, and there's no specific
implementation of Marvell, this compatible is used for errata only.
Signed-off-by: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/20200715070649.18733-4-tn@semihalf.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions