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| author |   Swee Leong Ching <leong.ching.swee@intel.com> | 2024-01-05 15:09:23 +0800 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2024-01-07 16:33:49 +0000 |
| commit | 477bd4beb93bf9ace9bda71f1437b191befa9cf4 (patch) | |
| tree | 12293e08c2d6e6687a4943629bb49e270268d80a /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dt-bindings: net: snps,dwmac: per channel irq (diff) | |
| download | wireguard-linux-477bd4beb93bf9ace9bda71f1437b191befa9cf4.tar.xz wireguard-linux-477bd4beb93bf9ace9bda71f1437b191befa9cf4.zip | |
net: stmmac: Make MSI interrupt routine generic
There is no support for per DMA channel interrupt for non-MSI platform,
where the MAC's per channel interrupt hooks up to interrupt controller(GIC)
through shared peripheral interrupt(SPI) to handle interrupt from TX/RX
transmit channel.
This patch generalize the existing MSI ISR to also support non-MSI
platform.
Signed-off-by: Teoh Ji Sheng <ji.sheng.teoh@intel.com>
Signed-off-by: Swee Leong Ching <leong.ching.swee@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions