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| author |   Vivien Didelot <vivien.didelot@savoirfairelinux.com> | 2017-03-30 17:37:08 -0400 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2017-04-01 12:22:57 -0700 |
| commit | 812289960f720c4a075f8766d40a3c6b5840c0cd (patch) | |
| tree | 1e2b69533c254eca6549190958f654bd4daeb0f1 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | net: dsa: mv88e6xxx: move PVT description in info (diff) | |
| download | wireguard-linux-812289960f720c4a075f8766d40a3c6b5840c0cd.tar.xz wireguard-linux-812289960f720c4a075f8766d40a3c6b5840c0cd.zip | |
net: dsa: mv88e6xxx: use 4-bit port for PVT data
The Cross-chip Port Based VLAN Table (PVT) supports two indexing modes,
one using 5-bit for device and 4-bit for port, the other using 4-bit for
device and 5-bit for port, configured via the Global 2 Misc register.
Only 4 bits for the source port are needed when interconnecting 88E6xxx
switch devices since they all support less than 16 physical ports. The
full 5 bits are needed when interconnecting a device with 98DXxxx switch
devices since they support more than 16 physical ports.
Add a mv88e6xxx_pvt_setup helper to set the 4-bit port PVT mode, which
will be extended later to also initialize the PVT content.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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0 files changed, 0 insertions, 0 deletions