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author | 2020-03-26 23:02:06 +0100 | |
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committer | 2020-04-20 12:15:23 +0200 | |
commit | 9c32f980d999b4f441044f94005b3e649d036694 (patch) | |
tree | 0dce31a63cae11be5c80bee03555286989d52c19 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | ARM: dts: stm32: enable stm32mp157's &gpu by default (diff) | |
download | wireguard-linux-9c32f980d999b4f441044f94005b3e649d036694.tar.xz wireguard-linux-9c32f980d999b4f441044f94005b3e649d036694.zip |
ARM: dts: stm32: preset stm32mp15x video #address- and #size-cells
The cell count for address and size is defined by the binding and not
something a board would change. Avoid each board adding this
boilerplate by having the cell size specification in the SoC DTSI.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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