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| author |   Biju Das <biju.das@bp.renesas.com> | 2019-09-30 09:18:45 +0100 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2019-10-10 16:22:07 +0200 |
| commit | bbbb919f3286f3bddfe9b23feaf184860d11d0ac (patch) | |
| tree | 03347733f602d3ad7a2ef9bebf29d683cad3cf24 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: dts: renesas: r8a774b1: Add SCIF and HSCIF nodes (diff) | |
| download | wireguard-linux-bbbb919f3286f3bddfe9b23feaf184860d11d0ac.tar.xz wireguard-linux-bbbb919f3286f3bddfe9b23feaf184860d11d0ac.zip | |
arm64: dts: renesas: r8a774b1: Add GPIO device nodes
Add GPIO device nodes to the DT of the r8a774b1 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569831527-1250-4-git-send-email-biju.das@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions