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| author |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-10-31 15:57:00 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-11-02 08:53:59 +0200 |
| commit | dbea79a50221899e2c3b4be9967f535e89fd6d00 (patch) | |
| tree | d82673ad267d716704810e0dfa7df4b69ba4cdf5 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/i915: Stop claiming cs timestamp frquency on gen2/3 (diff) | |
| download | wireguard-linux-dbea79a50221899e2c3b4be9967f535e89fd6d00.tar.xz wireguard-linux-dbea79a50221899e2c3b4be9967f535e89fd6d00.zip | |
drm/i915: Fix cs timestamp frequency for cl/bw
Despite what the spec says the TIMESTAMP register seems to
tick once every hrawclk (confirmed on i965gm and g35).
v2: Rebase
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221031135703.14670-4-ville.syrjala@linux.intel.com
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions