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author | 2023-01-12 15:48:40 +0000 | |
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committer | 2023-01-12 21:18:08 +0000 | |
commit | fd2b165ce2ccdaad7d5972987acac259cff66ccb (patch) | |
tree | 648093d96ab32be7382e719cef6c0755243d4ace /tools/perf/scripts/python/export-to-postgresql.py | |
parent | KVM: arm64: Synchronize SMEN on vcpu schedule out (diff) | |
download | wireguard-linux-fd2b165ce2ccdaad7d5972987acac259cff66ccb.tar.xz wireguard-linux-fd2b165ce2ccdaad7d5972987acac259cff66ccb.zip |
KVM: arm64: vgic-v3: Limit IPI-ing when accessing GICR_{C,S}ACTIVER0
When a vcpu is accessing *its own* redistributor's SGIs/PPIs, there
is no point in doing a stop-the-world operation. Instead, we can
just let the access occur as we do with GICv2.
This is a very minor optimisation for a non-nesting guest, but
a potentially major one for a nesting L1 hypervisor which is
likely to access the emulated registers pretty often (on each
vcpu switch, at the very least).
Reported-by: Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230112154840.1808595-1-maz@kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
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