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| author |   David Dueck <davidcdueck@googlemail.com> | 2014-09-17 14:26:48 +0200 |
|---|---|---|
| committer |   Marc Kleine-Budde <mkl@pengutronix.de> | 2014-09-18 11:15:37 +0200 |
| commit | e77980e50bc2850599d4d9c0192b67a9ffd6daac (patch) | |
| tree | 008ba8530575b4b7668582cb139d1ab00406efaf /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | can: flexcan: increase FLEXCAN_MCR_MAXMB() macro to 7 bits (diff) | |
| download | wireguard-linux-e77980e50bc2850599d4d9c0192b67a9ffd6daac.tar.xz wireguard-linux-e77980e50bc2850599d4d9c0192b67a9ffd6daac.zip | |
can: at91_can: add missing prepare and unprepare of the clock
In order to make the driver work with the common clock framework, this patch
converts the clk_enable()/clk_disable() to
clk_prepare_enable()/clk_disable_unprepare(). While there, add the missing
error handling.
Signed-off-by: David Dueck <davidcdueck@googlemail.com>
Signed-off-by: Anthony Harivel <anthony.harivel@emtrion.de>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: linux-stable <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions